Redesign atomic store with hints intrinsics

[Lukacma]

This proposal is about redesigning atomic store with hint intrinsics, to make them more easily extensible.

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[CarolineConcatto]

What will be the behaviour if hint is not valid?

[Lukacma]

I guess that is undefined behaviour and will be implementation based. For LLVM we will throw error and reject.

[CarolineConcatto]

Do we need to list all the possible memory order :

``__ATOMIC_RELAXED``, ``__ATOMIC_CONSUME``, ``__ATOMIC_ACQUIRE``,
``__ATOMIC_RELEASE``, ``__ATOMIC_ACQ_REL``, and ``__ATOMIC_SEQ_CST`` are
provided, with values corresponding to the enumerators of C11's

Or the ones you are defining is enough? I am asking because this will be a generic intrinsic now. So I am wondering if all the hint will only need these 3 macros.

[Lukacma]

__ATOMIC_CONSUME and __ATOMIC_ACQUIRE is only for loads. __ATOMIC_ACQ_REL doesn't fit pure store I think and rest are mentioned in spec.